EXTREME ULTRA-VIOLET LITHOGRAPHY (EUVL)- The next generation lithography

Moore's Law 

In the last few decades, the semiconductor industries had followed Moore’s law; the number of transistors per chip had been doubling each process generation. Figure 1 shows the logic transistor density over the last decade and the future trend using a quantity density metric. The linear scale implies a doubling of density every 2 years. Intel has announced the new 10-nm process that achieves 100.8 million transistors per square millimeter. This provides a notable 2.7 times transistor density improvement over its predecessor and suggests that Moore’s law is likely not slowing down. This enhancement of transistor density has been done by shrinking the sizes of the transistors.

EXTREME ULTRA-VIOLET LITHOGRAPHY (EUVL)

Due to wavelength limitations, current attention is directed toward developing EUVL which uses extreme ultraviolet radiation to increase efficiency, reduces manufacturing cost, and supports the development of processing power. In the last decade, researchers put extensive interest in EUVL as a ‘next wavelength’ replacement for 193-nm dense-UV lithography. EUVL utilizes 13.5-nm photons that are obtained typically from a plasma source. EUV light is then collected by an optical element called a ‘collector.’ Light from the collector is focused on the illuminator (formed of multilayer-coated normal incidence mirrors as well as grazing incidence mirrors) through an intermediate focus. The illuminator illuminates the right amount of light and guides it onto the reticle stage (i.e., a mask). The reflected image of the reticle arrives into the projection optics (consist of six or more multilayer mirrors) with a demagnification. Finally, the image is focused onto the wafer stage to form a pattern into a substrate coated with a photoresist. Every step is operated in a low-hydrocarbon, high-vacuum environment. Figure 1 shows a schematic of a EUVL exposure system.


Fig 1: Schematic of a EUVL system


Extreme ultraviolet (sometimes also called XUV) denotes soft x-rays with wavelengths between 124 and 10 nm or photon energies between 10 eV and 124 eV. The sun produces EUV; humans create it through synchrotrons, or from plasma.

Up until now, chipmakers have used ultraviolet (laser) light to project complex patterns onto silicon wafers coated with photoresist. In a process analogous to the development of the old paper photos, these patterns are developed and become conducting or isolating structures within one layer. This process is repeated until the complex systems forming an integrated circuit such as a microprocessor are complete.

The development of such lithographic systems are driven by the economy: Evermore computing power and storage capacity is needed while costs and power consumption must be lowered. This development can be described in a simple rule, well-known as Moore’s law, which says that the number of transistors in a dense integrated circuit double about every two years.

A major limitation comes from the laws of optics. German physicist Ernst Abbe found that the resolution of a microscope d is (roughly) limited to the wavelength ฮป of the light used in illumination:

d = ฮป/(n*sin(ฮฑ))          (1)

where n is the refractive index of the medium between the lens and the object and ฮฑ is the half-angle of the objective's cone of light. For lithography, substituting numerical aperture (NA) for n sin(ฮฑ) and adding a factor k to the formula (because lithographic resolution can be strongly tweaked with illumination tricks), the minimum feasible structure, or critical dimension (CD), is:

CD = kฮป/NA          (2)

This formula, which governs all lithographic imaging processes, makes it obvious why the wavelength is such a crucial parameter. As a result, engineers have been looking for light sources with ever-shorter wavelengths to produce ever-smaller features. Beginning with UV mercury-vapor lamps, they moved to excimer lasers with a wavelength of 193 nm. The lithography industry received a surprise when Intel announced in May 2003 that it would drop the 157 nm excimer laser as a next step and instead go for EUV at a 13.5 nm wavelength. Problems with optical materials were seen as the major obstacle, and EUV seemed just a few development steps away. 

Challenges to get EUV in production

The introduction of EUVL in a high-volume manufacturing (HVM) environment is facing several challenges. First, the light source has got to deliver a narrow band of high-EUV power (preferably with a high-spectral purity) to ensure high throughput. Second, reticle defectivity has emerged as a major concern for the HVM introduction of EUVL. The industry has recognized that a good strategy is essential for maintaining reticle cleanliness as reticle defects induce a major cost penalty on the enablement of EUV.

A key issue within the last 5 years exposure tool light sources, which weren’t powerful enough to even be used for pilot development. There has been significant progress within the past several years. It is fair to say that EUV scanners now have sufficient productivity to be used for pilot line development of chip-making processes.

 Fig 2: Inside NXE:3400 – the full optical light path with the EUV source at the bottom right and the mask at the top.

The most likely first manufacturing node possible for EUV use is that the 7 nm logic node. However, throughput and uptime suitable for manufacturing use still haven’t been demonstrated. Patterning technology for 7 nm logic node will probably need to be selected sometime in 2016 for production in 2018.

Improvement of scanner throughput, mask defects, and scanner uptime are preconditions for successful EUV use in manufacturing. EUV offers substantial benefits in process simplicity compared to multiple patterning by reducing mask counts and allowing more two-dimensional designs to be printed. These benefits are going to be the drive for change from multiple patterning. EUV is going to be adopted when it’ll be less expensive than multiple patterning.

                                                                        

Recent results show that EUV at the 7 nm node can be cost-effective if throughput conditions are met. A 32% increase in wafer cost is foreseen during a transition from the 16 to 10 nm node based on 193 nm immersion lithography and multiple patterning. This cost is increased by another 14% at the 7 nm technology node. A transition to EUVL at the 7 nm node helps to bring down the wafer cost by 16%, which might bring it on track for a node-on-node rise of no more than 20–25%. This, together with scaling benefits, allows the industry to return to Moore’s law curve. The sensitivity study of EUV throughput shows that 75 wafers/hour would be the enabler of the technology in terms of cost. EUV will enable several critical layers to be printed in a single pattern, thus reducing both the number of process steps and the critical masks.

Advantages and Disadvantages

Advantages of EUVL are high throughput, wide process windows, and extendibility to future nodes. It uses a smaller wavelength which leads to more densely packed components on the microchip, creating faster processing power. Hence, faster computer processors can be achieved with EUVL. This technique has the potential to provide economic sustainability with its applications in nearly every field including engineering and medical fields. Another advantage of EUVL is cost-effectiveness. Reduced power consumption and a lessened number of exposures make the EUVL more cost-effective in most patterning processes. Disadvantages of this lithography technique are higher startup costs, complexity, reliability, and relative infrastructure immaturity.

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Comments

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